Mandi: In a significant breakthrough for next-generation wireless communication, Dr. Anuj Verma, a researcher from the Indian Institute of Technology (IIT) Mandi, has developed an innovative 5G hardware chip that reduces energy consumption while ensuring clearer communication. The chip, which has already undergone successful testing, is expected to revolutionize the 5G network landscape in India and beyond.

The demand for 5G networks is rapidly increasing across the country, from urban centers to rural areas. As mobile service providers expand their 5G infrastructure, Dr. Verma’s invention addresses a critical need for energy-efficient solutions in wireless communication systems.

Dr. Verma’s award-winning thesis, titled Efficient VLSI-Architectures and ASIC-Fabrication of Channel Decoders for Contemporary Wireless Communication Systems, highlights practical solutions to challenges in the 5G New Radio standard. His research focuses on developing energy-efficient and reconfigurable architectures, which are vital for next-generation wireless communication.

The hardware designed by Dr. Verma incorporates five different design configurations, enabling reconfiguration into LDPC and polar coders—key components of the 5G standard. Published in several prestigious journals, this research marks a major advancement in the field of VLSI design.

Reflecting on his journey, Dr. Verma shared, “It took six years of rigorous effort to complete this research and develop the hardware. I dedicate this achievement to my supervisor, Dr. Rahul Shrestha, whose guidance was instrumental, and to my family for their unwavering support. I am deeply honoured to receive this recognition from the VLSID 2025 Conference.”

Dr. Verma was recently honoured with the Best PhD Thesis Award at the 38th IEEE VLSID 2025 Conference in Bengaluru. The award acknowledges his contributions to addressing critical challenges in wireless communication through hardware-efficient and high-throughput reconfigurable channel decoders.